| CPC G06F 3/0659 (2013.01) [G06F 3/0658 (2013.01); G06F 3/0622 (2013.01); G06F 3/0683 (2013.01)] | 20 Claims |
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1. A memory system comprising:
a memory controller configured to receive a single host command from a host and generate a normal command, a refresh command, a first enable signal and a second enable signal in response to receiving the host command;
a first memory device configured to receive the first enable signal from the memory controller; and
a second memory device configured to receive the second enable signal from the memory controller,
wherein the host command indicates whether to access each of the first memory device and the second memory device and whether to refresh each of the first memory device and the second memory device,
the memory controller is further configured to:
determine whether to access each of the first memory device and the second memory device based on the host command;
determine whether to refresh each of the first memory device and the second memory device based on the host command;
transmit the first enable signal to the first memory device to enable the first memory device and the normal command to the first memory device responsive to determining that the first memory device is to be accessed; and
transmit the second enable signal to the second memory device to enable the second memory device and the refresh command to the second memory device responsive to determining that the second memory device is to be refreshed,
the first memory device performs a normal operation in an enable state based on the normal command and the first enable signal, and
the second memory device performs a refresh operation in an enable state based on the refresh command and the second enable signal.
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