US 12,430,060 B2
Methods and apparatus to adapt memory channel usage on a per-user basis
Jianwei Dai, Portland, OR (US); Virendra Vikramsinh Adsure, Folsom, CA (US); Taeyoung Kim, Fremont, CA (US); Chia-Hung S. Kuo, Folsom, CA (US); Deepak Gandiga Shivakumar, Beaverton, OR (US); Amir Ali Radjai, Portland, OR (US); Deepak Samuel Kirubakaran, Hillsboro, OR (US); Jianfang Zhu, Portland, OR (US); and Ivan Chen, Taipei (TW)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 21, 2021, as Appl. No. 17/558,353.
Prior Publication US 2022/0188016 A1, Jun. 16, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0625 (2013.01); G06F 3/0679 (2013.01)] 23 Claims
OG exemplary drawing
 
1. An apparatus comprising:
at least one memory;
instructions; and
processor circuitry to execute the instructions to:
determine memory usage data associated with a user profile, the memory usage data including at least one of a maximum memory bandwidth associated with the user profile, a maximum memory capacity usage associated with the user profile, a maximum memory latency associated with the user profile, or applications associated with the user profile;
determine an address hashing policy based on the memory usage data; and
determine power states of memory channels based on the address hashing policy.