CPC H03M 1/0612 (2013.01) [H03K 5/2481 (2013.01); H03M 1/002 (2013.01); H03M 1/1057 (2013.01)] | 17 Claims |
1. A multi-stage voltage-to-delay converter for converting input signals into delay signals, comprising:
a first stage for receiving the input signals and for generating intermediate output signals, wherein timing of the intermediate output signals corresponds to voltages of the input signals, and wherein the first stage has a voltage source for providing a rail-to-rail voltage; and
a second stage, connected to the first stage, for receiving the intermediate output signals and for generating rail-to-rail output signals, wherein timing of the rail-to-rail output signals corresponds to the timing of the intermediate output signals, and wherein voltages of the rail-to-rail output signals correspond to the rail-to-rail voltage of the voltage source.
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