CPC F24F 11/56 (2018.01) [G08C 17/02 (2013.01); H03B 5/32 (2013.01)] | 18 Claims |
1. A wireless communication device comprising:
a main control chip including:
a reset pin configured to reset the main control chip; and
a debug serial port input pin configured to read and detect a running state of a program performed in the main control chip, the debug serial port input pin being connected to a direct-current power source to receive a stable high voltage level input; and
an outline interface;
wherein:
the reset pin is disconnected from an input pin of the outline interface; and
the debug serial port input pin of the main control chip is connected to a debug serial port input pin of the outline interface.
|