CPC B81C 1/00111 (2013.01) [A61B 5/293 (2021.01); B81B 1/008 (2013.01); A61B 2562/125 (2013.01); A61N 1/0529 (2013.01); B81B 2201/055 (2013.01); B81B 2203/0361 (2013.01); B81B 2203/04 (2013.01); B81C 2201/0133 (2013.01)] | 20 Claims |
1. A method of manufacturing neural probes from a silicon wafer which comprises:
providing a silicon wafer having a top side and a back side;
designing a probe shape of neural probes to be made from the silicon wafer, said probe shape including a backend and at least one shank extending outward from the backend;
providing at least one microelectrode on the shank of the probe shape, providing at least one bonding pad on the backend of the probe shape, and providing at least one interconnect, at least one interconnect connecting each microelectrode and each bonding pad, the number of microelectrodes, the number of bonding pads, and the number of interconnects being equal, the at least one bonding pad and the at least one interconnect being provided on a first electrical insulating layer provided on the top side of the silicon wafer and the at least one microelectrode being provided on the first electrical insulating layer or in or on a second electrical insulating layer that is provided on the first electrical insulating layer;
etching through said first and second insulating layers and a top portion of the top side of the silicon wafer in a pattern that corresponds to the probe shape of the neural probe; and
dicing the back side of the silicon wafer to form a neural probe having the probe shape with the shank having a thickness.
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