US 11,769,769 B2
Integrated circuit device and method of fabricating the same
Hwi-Chan Jun, Yongin-si (KR); Heon-jong Shin, Yongin-si (KR); In-chan Hwang, Siheung-si (KR); and Jae-ran Jang, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 21, 2022, as Appl. No. 17/699,609.
Application 17/699,609 is a continuation of application No. 17/038,217, filed on Sep. 30, 2020, granted, now 11,316,010.
Application 17/038,217 is a continuation of application No. 16/935,487, filed on Jul. 22, 2020, granted, now 10,879,239, issued on Dec. 29, 2020.
Application 16/935,487 is a continuation of application No. 16/840,322, filed on Apr. 3, 2020, granted, now 10,763,256, issued on Sep. 1, 2020.
Application 16/840,322 is a continuation of application No. 15/808,865, filed on Nov. 9, 2017, granted, now 10,665,588, issued on May 26, 2020.
Claims priority of application No. 10-2017-0030534 (KR), filed on Mar. 10, 2017.
Prior Publication US 2022/0208966 A1, Jun. 30, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 21/768 (2006.01); H01L 21/265 (2006.01); H01L 27/02 (2006.01); H01L 21/762 (2006.01); H01L 21/761 (2006.01); H01L 23/528 (2006.01); H01L 29/78 (2006.01)
CPC H01L 27/0886 (2013.01) [H01L 21/26513 (2013.01); H01L 21/761 (2013.01); H01L 21/76224 (2013.01); H01L 21/76877 (2013.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01); H01L 21/823481 (2013.01); H01L 23/528 (2013.01); H01L 27/0207 (2013.01); H01L 29/0646 (2013.01); H01L 29/0649 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/41775 (2013.01); H01L 29/41791 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/785 (2013.01); H01L 29/7854 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a fin-type active region extending on a substrate in a first horizontal direction;
a gate line extending on the fin-type active region in a second horizontal direction intersecting the first horizontal direction;
a source/drain region in the fin-type active region at one side of the gate line; and
a fin isolation insulating unit vertically extending into the fin-type active region,
wherein the fin isolation insulating unit comprises an upper portion over the fin-type active region and a lower portion buried in the fin-type active region, the upper portion facing the gate line in the first horizontal direction, the lower portion having a round-shaped sidewall, and
wherein the lower portion of the fin isolation insulating unit comprises a maximum width defined by the round-shaped sidewall in the first horizontal direction at a level lower than a bottom of the source/drain region.