US 11,769,742 B2
Semiconductor chip and semiconductor package including the same
Eunyoung Jeong, Hwaseong-si (KR); Juik Lee, Anyang-si (KR); and Junghoon Han, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on May 18, 2022, as Appl. No. 17/747,190.
Application 17/747,190 is a continuation of application No. 16/922,828, filed on Jul. 7, 2020, granted, now 11,362,053.
Claims priority of application No. 10-2019-0136943 (KR), filed on Oct. 30, 2019.
Prior Publication US 2022/0278061 A1, Sep. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/05 (2013.01) [H01L 2224/05583 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor chip, the method comprising:
preparing a semiconductor substrate;
forming a top connection pad in a top surface; and
forming a protection insulation layer having an opening therein, the protection insulation layer not covering at least a portion of the top connection pad, on the semiconductor substrate,
wherein the protection insulation layer includes:
a bottom protection insulation layer,
a cover insulation layer comprising a side cover part that covers at least a portion of a side surface of the bottom protection insulation layer and a top cover part disposed apart from the side cover part to cover at least a portion of a top surface of the bottom protection insulation layer, and
a top protection insulation layer formed of a photosensitive polyimide, and disposed on the top cover part.