US 11,769,689 B2
Method of manufacturing semiconductor device
Dong Hun Lee, Icheon-si (KR); Jeong Hwan Kim, Icheon-si (KR); Mi Seong Park, Icheon-si (KR); Jung Shik Jang, Icheon-si (KR); and Won Geun Choi, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jun. 11, 2021, as Appl. No. 17/345,926.
Claims priority of application No. 10-2020-0166037 (KR), filed on Dec. 1, 2020.
Prior Publication US 2022/0172985 A1, Jun. 2, 2022
Int. Cl. H01L 21/768 (2006.01)
CPC H01L 21/76802 (2013.01) [H01L 21/76838 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a stack;
forming a preliminary stepped structure by patterning the stack;
forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure;
forming a passivation layer that fills the opening and covers the first stepped structure; and
forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.