US 11,769,633 B2
Board having multilayer capacitor mounted thereon and multilayer capacitor package
Gu Won Ji, Suwon-si (KR); Heung Kil Park, Suwon-si (KR); Sang Soo Park, Suwon-si (KR); and Young Ghyu Ahn, Suwon-si (KR)
Assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed on Jun. 16, 2021, as Appl. No. 17/349,275.
Application 17/349,275 is a division of application No. 16/990,288, filed on Aug. 11, 2020, abandoned.
Claims priority of application No. 10-2019-0116376 (KR), filed on Sep. 20, 2019; and application No. 10-2020-0099136 (KR), filed on Aug. 7, 2020.
Prior Publication US 2021/0313115 A1, Oct. 7, 2021
Int. Cl. H01G 4/008 (2006.01); H01G 4/012 (2006.01); H01G 4/12 (2006.01); H01G 4/228 (2006.01); H01G 4/30 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01)
CPC H01G 4/30 (2013.01) [H01G 4/008 (2013.01); H01G 4/012 (2013.01); H01G 4/12 (2013.01); H01G 4/228 (2013.01); H05K 1/111 (2013.01); H05K 1/181 (2013.01); H05K 2201/10015 (2013.01)] 1 Claim
OG exemplary drawing
 
1. A multilayer capacitor package, comprising:
a first packing part having a first label containing first information, and including a first housing and a first multilayer capacitor disposed in the first housing, internal electrodes of the first multilayer capacitor disposed horizontally with respect to a bottom surface of the first housing; and
a second packing part having a second label containing second information, and including a second housing and a second multilayer capacitor disposed in the second housing, internal electrodes of the second multilayer capacitor disposed vertically with respect to a bottom surface of the second housing,
wherein a size of the first multilayer capacitor is substantially the same as a size of the second multilayer capacitor,
the first information indicates a first distance Lp1 between outer edges of pads on a board, on which the first multilayer capacitor is to be mounted,
Lp1/Lc≤1.35, in which Lc is a length of each of the first and second multilayer capacitors,
the second information indicates a second distance Lp2 between outer edges of pads on a board, on which the second multilayer capacitor is to be mounted, and
Lp2/Lc>1.35.