US 11,769,247 B2
Exposed pad integrated circuit package
Reynaldo Corpuz Javier, Plano, TX (US); Alok Kumar Lohia, Dallas, TX (US); and Andy Quang Tran, Grand Prairie, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Dec. 7, 2021, as Appl. No. 17/544,896.
Application 17/544,896 is a division of application No. 14/671,727, filed on Mar. 27, 2015, granted, now 11,195,269.
Prior Publication US 2022/0092767 A1, Mar. 24, 2022
Int. Cl. G06T 7/00 (2017.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H05K 3/34 (2006.01)
CPC G06T 7/0008 (2013.01) [H01L 23/49503 (2013.01); H01L 23/49555 (2013.01); H01L 23/49568 (2013.01); H01L 24/00 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H05K 3/3421 (2013.01); H05K 2201/10689 (2013.01); H05K 2201/10969 (2013.01)] 21 Claims
OG exemplary drawing
 
1. An integrated circuit (“IC”) assembly, comprising:
an exposed pad IC package having:
a thermal pad having a top surface and a bottom surface and having at least one peripheral surface portion extending transversely of and continuous with the bottom surface; and
a layer of mold compound through which the bottom surface and the at least one peripheral surface portion are exposed, wherein:
the at least one peripheral surface portion is flushed with a surface of the layer of mold compound; and
the at least one peripheral surface portion corresponds to a surface of a flange that extends transversely of the top surface of the thermal pad.