CPC G06F 21/79 (2013.01) [G06F 21/85 (2013.01)] | 15 Claims |
1. An apparatus comprising:
a memory;
a processor executing instructions stored in the memory to:
receive a direct memory access (DMA) request from a driver of a device, wherein:
the DMA request comprises an address and an identifier (ID) of the device that uniquely identifies the device; and
the device is a bus mastering (BM) device, wherein the BM device is a trusted device, and wherein the BM device is to:
access a range of addresses using the ID of the device;
determine whether the address is in the range of addresses; and
process the DMA request responsive to verifying that the address is in the range of addresses.
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