US 12,426,515 B2
Semiconductor device and method for fabricating the same
Hsiang-Wen Ke, Kaohsiung (TW); Wei-Chuan Tsai, Changhua County (TW); Yen-Tsai Yi, Tainan (TW); and Jin-Yan Chiou, Tainan (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Nov. 23, 2021, as Appl. No. 17/533,146.
Claims priority of application No. 202111245898.5 (CN), filed on Oct. 26, 2021.
Prior Publication US 2023/0125856 A1, Apr. 27, 2023
Int. Cl. H10N 50/10 (2023.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01); H10N 50/85 (2023.01)
CPC H10N 50/10 (2023.02) [H10B 61/22 (2023.02); H10N 50/01 (2023.02); H10N 50/80 (2023.02); H10N 50/85 (2023.02)] 11 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor device, comprising:
forming an inter-metal dielectric (IMD) layer on a substrate;
forming a trench in the IMD layer;
forming a barrier layer in the trench;
forming a nucleation layer on the barrier layer;
performing an anneal process to crystallize a part of the nucleation layer for forming a silicide layer without enabling the nucleation layer to react with the barrier layer disposed thereunder, wherein the barrier layer, the silicide layer and another part of the nucleation layer are sequentially distributed in the trench;
forming a bulk layer on the silicide layer; and
forming a magnetic tunneling junction (MTJ) on the bulk layer.