US 12,426,459 B2
Display substrate, method of manufacturing the display substrate, and display device
Bo Cheng, Beijing (CN); Jie Gou, Beijing (CN); Mengmeng Du, Beijing (CN); Jun Yan, Beijing (CN); Bo Zhang, Beijing (CN); Yixiang Yang, Beijing (CN); Zhenhua Zhang, Beijing (CN); and Hongwei Ma, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Chengdu (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/787,986
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Chengdu (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Aug. 4, 2021, PCT No. PCT/CN2021/110548
§ 371(c)(1), (2) Date Jun. 22, 2022,
PCT Pub. No. WO2022/052681, PCT Pub. Date Mar. 17, 2022.
Claims priority of application No. 202010950350.X (CN), filed on Sep. 10, 2020.
Prior Publication US 2023/0045292 A1, Feb. 9, 2023
Int. Cl. H01L 21/78 (2006.01); G09G 3/00 (2006.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 77/10 (2023.01); H10K 59/00 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/006 (2013.01); H10D 86/441 (2025.01); H10D 86/60 (2025.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 77/111 (2023.02); H10K 59/00 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A display substrate, comprising:
a base substrate comprising a display region, a bonding region located on at least one side of the display region, and a side region located on at least another side of the display region;
a plurality of sub-pixels located in the display region;
a gate driving circuit located in the side region, connected to the plurality of sub-pixels, and configured to provide a gate driving signal to the plurality of sub-pixels;
a plurality of input contact pads located in the bonding region, and configured to be electrically connected to an external circuit;
a plurality of output contact pads located in the bonding region between the plurality of input contact pads and the display region, and electrically connected to the plurality of sub-pixels and the gate driving circuit;
a contact pad insulating layer located in the bonding region within a gap between adjacent input contact pads among the plurality of input contact pads, a gap between adjacent output contact pads among the plurality of output contact pads, and a region between the plurality of input contact pads and the plurality of output contact pads, wherein surfaces of the plurality of input contact pads away from the base substrate and surfaces of the plurality of output contact pads away from the base substrate are exposed from the contact pad insulating layer, wherein the contact pad insulating layer comprises a first portion having a first thickness and a second portion having a second thickness smaller than the first thickness, edges of the plurality of input contact pads and edges of the plurality of output contact pads are covered by the first portion of the contact pad insulating layer, and the second portion of the contact pad insulating layer is located in the region between the plurality of input contact pads and the plurality of output contact pads; and
a plurality of first dummy contact pads located in the bonding region within the region between the plurality of input contact pads and the plurality of output contact pads,
wherein edges of the plurality of first dummy contact pads are covered by the first portion of the contact pad insulating layer, and surfaces of the plurality of first dummy contact pads away from the base substrate are exposed from the first portion of the contact pad insulating layer; and
wherein the second portion of the contact pad insulating layer comprises a first sub-portion and a second sub-portion, the first sub-portion is located in a region between the plurality of first dummy contact pads and the plurality of input contact pads, the second sub-portion is located in a region between the plurality of first dummy contact pads and the plurality of output contact pads.