| CPC H10K 59/125 (2023.02) [H10K 59/1201 (2023.02); H10K 59/131 (2023.02); H10K 59/8792 (2023.02)] | 10 Claims |

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1. A display panel, comprising a plurality of pixel units, wherein the pixel units comprises a light-emitting area and a non-light-emitting area arranged on at least one side of the light-emitting area, wherein the display panel comprises:
a substrate;
an active layer disposed over the substrate;
a gate disposed on the active layer;
an interlayer dielectric layer disposed on the gate;
a source/drain metal layer, wherein the source/drain metal layer is disposed on the interlayer dielectric layer and electrically connected to the active layer; and
a first conductive layer, wherein the first conductive layer is disposed on the interlayer dielectric layer;
wherein the source/drain metal layer is disposed in the non-light-emitting area, the source/drain metal layer is disposed on the first conductive layer and is electrically connected to the first conductive layer, and a thickness of the first conductive layer is smaller than a thickness of the source/drain metal layer;
wherein the first conductive layer is disposed in the light-emitting area and the non-light-emitting area, and an orthographic projection of the source/drain metal layer on the interlayer dielectric layer is within an orthographic projection of the first conductive layer on the interlayer dielectric layer.
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