US 12,426,363 B2
Method for manufacturing display panel, display panel and to-be-cut display panel
Haitao Wang, Beijing (CN); Ming Wang, Beijing (CN); Jun Cheng, Beijing (CN); Bin Zhou, Beijing (CN); Jun Wang, Beijing (CN); Yongchao Huang, Beijing (CN); Tongshang Su, Beijing (CN); and Qinghe Wang, Beijing (CN)
Assigned to Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/913,808
Filed by Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Oct. 26, 2021, PCT No. PCT/CN2021/126405
§ 371(c)(1), (2) Date Sep. 22, 2022,
PCT Pub. No. WO2022/199014, PCT Pub. Date Sep. 29, 2022.
Claims priority of application No. 202110304206.3 (CN), filed on Mar. 22, 2021.
Prior Publication US 2024/0213278 A1, Jun. 27, 2024
Int. Cl. H10D 86/60 (2025.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01)
CPC H10D 86/0231 (2025.01) [H10D 86/441 (2025.01); H10D 86/60 (2025.01)] 17 Claims
OG exemplary drawing
 
1. A method for manufacturing a display panel, comprising:
forming a first electrostatic protective circuit and a source and drain conductive pattern on a base substrate, the base substrate comprising a target cutting region, wherein the target cutting region is overlapped with an orthographic projection of the first electrostatic protective circuit on the base substrate, and the target cutting region is overlapped with an orthographic projection of the source and drain conductive pattern on the base substrate;
removing the source and drain conductive pattern within the target cutting region;
forming a to-be-cut display panel by forming a superstructure on the base substrate; and
cutting the to-be-cut display panel in the target cutting region;
wherein prior to forming the first electrostatic protective circuit and the source and drain conductive pattern on the base substrate, the method further comprises:
forming a second electrostatic protective circuit on the base substrate; and
wherein forming the first electrostatic protective circuit and the source and drain conductive pattern on the base substrate comprises:
forming a first insulative layer on the base substrate on which the second electrostatic protective circuit is formed;
forming a first via hole in the first insulative layer, wherein the second electrostatic protective circuit comprises an exposed region at the first via hole;
forming a source and drain conductive film layer on the base substrate on which the first insulative layer is formed; and
treating the source and drain conductive film layer by a patterning process into the first electrostatic protective circuit and the source and drain conductive pattern, wherein the first electrostatic protective circuit is electrically connected to the second electrostatic protective circuit via the first via hole.