| CPC H10D 64/01 (2025.01) [H10D 62/107 (2025.01); H10D 64/111 (2025.01)] | 17 Claims |

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1. A method of producing a power semiconductor device, the method comprising:
providing a semiconductor body;
forming, at the semiconductor body, a polycrystalline semiconductor region, wherein forming the polycrystalline semiconductor region includes a structuring step during which a lateral structuration of the polycrystalline semiconductor region is performed to form a laterally structured polycrystalline semiconductor region;
forming, at the polycrystalline semiconductor region, an amorphous sublayer, wherein forming the amorphous sublayer includes a damage implantation processing step, wherein the damage implantation processing step is carried out as an unmasked implantation to form a doped semiconductor region in the semiconductor body adjacent to the laterally structured polycrystalline semiconductor region;
subjecting the amorphous sublayer to a re-crystallization processing step to form a re-crystallized sublayer; and
forming a metal layer at the re-crystallized sublayer.
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