US 12,426,319 B2
Semiconductor device and method for manufacturing the same
Yohei Iwahashi, Nisshin (JP); and Jun Saito, Nisshin (JP)
Assigned to DENSO CORPORATION, Kariya (JP); TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota (JP); and MIRISE Technologies Corporation, Nisshin (JP)
Filed by DENSO CORPORATION, Kariya (JP); TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota (JP); and MIRISE Technologies Corporation, Nisshin (JP)
Filed on Oct. 31, 2022, as Appl. No. 17/977,420.
Claims priority of application No. 2021-182833 (JP), filed on Nov. 9, 2021.
Prior Publication US 2023/0143618 A1, May 11, 2023
Int. Cl. H10D 62/10 (2025.01); H01L 21/04 (2006.01); H10D 12/01 (2025.01); H10D 30/66 (2025.01); H10D 62/17 (2025.01); H10D 62/832 (2025.01)
CPC H10D 62/111 (2025.01) [H01L 21/046 (2013.01); H10D 12/031 (2025.01); H10D 30/668 (2025.01); H10D 62/393 (2025.01); H10D 62/8325 (2025.01)] 3 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a drift layer of a first conductivity type;
a base layer of a second conductivity type disposed on a surface layer portion of the drift layer;
an impurity region of the first conductivity type disposed on a surface layer portion of the base layer, the impurity region having an impurity concentration higher than that of the drift layer;
a trench gate structure including a gate insulating film disposed on a wall surface of a trench that penetrates the base layer and the impurity region and reaches the drift layer, and a gate electrode disposed on the gate insulating film;
a first deep layer of the second conductivity type disposed below the trench in the drift layer, and separated from the trench;
a second deep layer of the second conductivity type connecting the base layer and the first deep layer;
a high-concentration layer of the first conductivity type or the second conductivity type disposed opposite to the base layer with respect to the drift layer, the high-concentration layer having an impurity concentration higher than that of the drift layer;
a first electrode electrically connected to the base layer and the impurity region; and
a second electrode electrically connected to the high-concentration layer, wherein
the semiconductor device is configured to be in an on state so that a current occurs between the first electrode and the second electrode when the gate electrode is applied with a gate voltage being equal to or higher than a predetermined voltage, and to be in an off state when the gate electrode is applied with a gate voltage being lower than the predetermined voltage,
the first deep layer has a high-concentration region and a low-concentration region in a concentration profile of an impurity concentration along a depth direction that corresponding to a stacking direction of the drift layer and the base layer,
the high-concentration region has a high concentration peak at which the impurity concentration is maximum, and includes a region that is not depleted in the off state,
the low-concentration region is disposed adjacent to the high-concentration layer than the high-concentration region, has a region in which a gradient of change in the impurity concentration is smaller than a predetermined value, and is depleted in the off state,
a position closest to the base layer in the first deep layer is referred to as a first position, a position of the high concentration peak is referred to as a second position, a position closest to the base layer in the low-concentration region is referred to as a third position, the high-concentration region is disposed between the first position and the third position, and
a first length between the first position and the second position is shorter than a second length between the second position and the third position.