| CPC H10D 30/6735 (2025.01) [H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 62/151 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01); H10D 84/013 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01)] | 20 Claims |

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1. A method for fabricating a semiconductor device, comprising:
forming a fin structure extending along a first lateral direction;
forming a dummy gate structure over a portion of the fin structure, wherein the dummy gate structure extends along a second direction perpendicular to the first lateral direction;
growing source/drain structures that are respectively coupled to ends of the portion of the fin structure;
removing the dummy gate structure to form a gate trench;
lining inner sidewalls of the gate trench with a gate spacer;
etching the gate spacer to expose the fin structure; and
forming an active gate structure over the etched gate spacer in the gate trench.
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