US 12,426,305 B2
Semiconductor device including transistor having source/drain contract with convex curved surface
Seung Hoon Choi, Yongin-si (KR); Ja Eung Koo, Yongin-si (KR); and Il Young Yoon, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Mar. 3, 2022, as Appl. No. 17/685,909.
Claims priority of application No. 10-2021-0108752 (KR), filed on Aug. 18, 2021.
Prior Publication US 2023/0053379 A1, Feb. 23, 2023
Int. Cl. H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01)
CPC H10D 30/6729 (2025.01) [H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/01 (2025.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a gate structure including a gate electrode and a gate capping pattern on an upper surface of the gate electrode in a first direction, and an upper surface of the gate capping pattern includes a concave curved surface;
a source/drain pattern on at least one side of the gate structure;
a source/drain contact on and connected with an upper surface of the source/drain pattern, the source/drain contact extending along a sidewall of the gate electrode; and
an etch stop layer disposed on the source/drain contact,
wherein an upper surface of the source/drain contact includes a convex curved surface, and
wherein the convex curved surface includes a linear portion in a cross-section of the convex curved surface defined by the first direction and a second direction perpendicular to the first direction, a first portion of the linear portion contacts an insulating layer disposed thereon and a second portion of the linear portion contacts a conducting layer disposed thereon,
the etch stop layer is continuously disposed on the convex curved surface of the upper surface of the source/drain contact and the concave curved surface of the gate capping pattern.