| CPC H10B 20/25 (2023.02) [H10N 50/01 (2023.02); H10N 50/80 (2023.02)] | 20 Claims |

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1. A method for fabricating a memory device, comprising:
in an one-time-programmable (OTP) memory unit disposed next to a memory unit,
forming a structure within a continuous active region;
forming a first conductive segment of the structure and a second conductive segment of the structure above the continuous active region; and
forming a first magnetic tunnel junction (MTJ) component in a first conductive layer above the continuous active region and below the first conductive segment,
wherein the first conductive segment and the second conductive segment are separated from each other and correspond to a first source/drain terminal of a first transistor and a first source/drain terminal of a second transistor, respectively, and are coupled to the first MTJ component.
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