US 12,426,259 B2
Integrated circuit device
Hyeran Lee, Suwon-si (KR); Junhyeok Ahn, Suwon-si (KR); and Kiseok Lee, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 30, 2022, as Appl. No. 18/148,566.
Claims priority of application No. 10-2022-0064252 (KR), filed on May 25, 2022.
Prior Publication US 2023/0413538 A1, Dec. 21, 2023
Int. Cl. H10B 12/00 (2023.01); H01L 23/528 (2006.01); H10D 64/27 (2025.01)
CPC H10B 12/488 (2023.02) [H01L 23/5283 (2013.01); H10B 12/482 (2023.02); H10D 64/513 (2025.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a substrate comprising an active region and a word line trench extending longitudinally in a first horizontal direction across the active region;
a word line in the word line trench and extending longitudinally in the first horizontal direction at a vertical level lower than a main surface of the substrate;
a buried insulating layer on the word line in the word line trench;
a conductive plug on the substrate; and
a pad structure on the substrate and having a first portion in contact with a top surface of the active region and a second portion in contact with the conductive plug,
wherein the pad structure comprises:
a conductive pad having a bottom surface in contact with the top surface of the active region and a first sidewall extending along an extension line of an inner sidewall of the word line trench, and
a pad spacer in contact with the first sidewall of the conductive pad and protruding beyond the inner sidewall of the word line trench in a second horizontal direction orthogonal to the first horizontal direction such that the pad spacer vertically overlaps a portion of the word line in the word line trench.