| CPC H04W 64/00 (2013.01) [H04L 5/0051 (2013.01); H04W 76/20 (2018.02)] | 3 Claims |
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1. A first device, comprising:
at least one processor; and
at least one memory storing instructions that, when executed by the at least one processor, cause the first device at least to:
select a reference signal sequence from a plurality of available reference signal sequences;
generate, based on the selected reference signal sequence, a reference signal for positioning; and
transmit, to a second device, the generated reference signal to indicate, with the selection of the reference signal sequence, at least part of side information related to the positioning;
wherein the side information comprises at least one of an identification or a margin of a timing error group associated with the selected reference signal sequence;
wherein the first device is further caused to:
prior to the selecting, cause the association of the reference signal sequence and the at least one of the identification or the margin of the timing error group;
wherein the first device is caused to cause the association by:
requesting the second device for associations of the plurality of available reference signal sequences and a plurality of available identifications of timing error groups, the plurality of available identifications of timing error groups comprising the identification of the timing error group, and
wherein the first device is caused to request the second device for the associations by:
sending, to the second device, an indication of the plurality of available identifications of timing error groups to request for reference signal sequences associated with respective ones of the plurality of available identifications of timing error groups.
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