| CPC H04W 36/22 (2013.01) [H04B 3/542 (2013.01); H04B 3/544 (2013.01); H04B 3/56 (2013.01); H04L 47/6215 (2013.01); H04W 28/0268 (2013.01); H04W 28/06 (2013.01); H04W 84/12 (2013.01); H04W 84/18 (2013.01)] | 20 Claims |

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1. An apparatus for wirelessly transmitting data comprising:
a dynamic memory access module configured to receive a data stream of a first data rate and split it into a plurality of N data streams of a second data rate in accordance with a predetermined rank and order, where N is an integer, and wherein the order is a size of data blocks of consecutive bits of data in the first data rate data stream inserted into each second data rate data stream and the rank is the spacing between the data blocks inserted into each of the second data rate data streams wherein the first data rate is of a higher value relative to a value of the second data rate;
N data buffers configured to receive the data in the N data rate streams, respectively;
N radio transmitters for transmitting the N data rate data streams, respectively; and
an interface coupled between the N data buffers and the N radio transmitters configured to receive the N second data rate data streams from the N data buffers and send the N second data rate data streams to the N radio transmitters, respectively; and
wherein the N radio transmitters are configured to simultaneously transmit the N second data rate data streams.
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