| CPC H04L 47/125 (2013.01) [H04L 47/6245 (2013.01)] | 20 Claims |
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1. A system for transferring network traffic, the system comprising:
a first first-in/first-out (FIFO) memory circuit;
a second FIFO memory circuit;
a controller;
a first processing engine;
a second processing engine; and
wherein the controller is configured to designate the first processing engine for processing a first series of network traffic packets and designating the second processing engine for processing a second series of network traffic packets; wherein the first series of network traffic packets are unicast packets and the second series of network traffic packets are multicast traffic packets; and wherein:
a first identifier of one of the first series of network traffic packets is loaded into the first FIFO memory circuit,
a second identifier of another one of the first series of network traffic packets is loaded into the first FIFO memory circuit after the first identifier, wherein the one of the first series of network traffic packets corresponding to the first identifier is designated for processing by the first processing engine before the one of the first series of network traffic packets corresponding to the second identifier is designated for processing by the first processing engine;
a third identifier of one of the second series of network traffic packets is loaded into the first FIFO memory circuit; and
a fourth identifier of another one of the second series of network traffic packets is loaded into the second FIFO memory circuit, wherein the one of the second series of network traffic packets corresponding to the third identifier is designated for processing by the second processing engine before the one of the first series of network traffic packets corresponding to the fourth identifier is designated for processing by the second processing engine.
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