US 12,425,010 B2
Pulse generator and method
Markus Haunschild, Markt Wald (DE); Martin Feldtkeller, Munich (DE); Lei Liao, Unterhaching (DE); and Claudio Andreotti, Munich (DE)
Assigned to Cypress Semiconductor Corporation, San Jose, CA (US)
Filed by Cypress Semiconductor Corporation, San Jose, CA (US)
Filed on Feb. 19, 2024, as Appl. No. 18/581,132.
Prior Publication US 2025/0266817 A1, Aug. 21, 2025
Int. Cl. H03K 5/134 (2014.01); H03K 5/135 (2006.01); H03K 7/08 (2006.01); H03K 5/00 (2006.01)
CPC H03K 5/134 (2014.07) [H03K 5/135 (2013.01); H03K 7/08 (2013.01); H03K 2005/00058 (2013.01); H03K 2005/00104 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A pulse generator, comprising:
a circuit configured to generate a coarse pulse width signal based on a digital pulse code;
a first delay unit configured to generate a first delayed coarse pulse width signal;
a delay locked loop circuit configured to generate a first subphase signal and a second subphase signal based on a system clock signal;
a first analog interpolator having a first input generated based on the coarse pulse width signal and the first subphase signal, a second input generated based on the first delayed coarse pulse width signal and the first subphase signal, and an output having a first delay configured based on the digital pulse code;
a second analog interpolator having a first input generated based on the coarse pulse width signal and the second subphase signal, a second input generated based on the first delayed coarse pulse width signal and the second subphase signal, and an output having a second delay configured based on the digital pulse code; and
an amplifier having a first input connected to the output of the first analog interpolator and a second input connected to the output of the second analog interpolator and configured to generate a fine pulse width modulation signal.