US 12,424,558 B2
Bridge die having different surface orientation than IC dies interconnected by the bridge die
Yu-Sheng Lin, Zhubei (TW); Chin-Fu Kao, Taipei (TW); Tsung-Yang Hsieh, Taipei (TW); Jyun-Lin Wu, Hsinchu (TW); and Yao-Chun Chuang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Aug. 12, 2022, as Appl. No. 17/887,150.
Prior Publication US 2024/0055354 A1, Feb. 15, 2024
Int. Cl. H01L 23/538 (2006.01); H01L 21/02 (2006.01); H01L 23/00 (2006.01); H01L 23/14 (2006.01); H01L 23/15 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/538 (2013.01) [H01L 21/02433 (2013.01); H01L 23/145 (2013.01); H01L 23/147 (2013.01); H01L 23/15 (2013.01); H01L 23/562 (2013.01); H01L 25/0655 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/05432 (2013.01); H01L 2924/05442 (2013.01); H01L 2924/1437 (2013.01); H01L 2924/15787 (2013.01); H01L 2924/15788 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
a first integrated circuit (IC) die that includes a first substrate;
a second IC die that includes a second substrate, wherein a top surface of at least one of the first substrate or the second substrate has a first crystal lattice surface orientation, wherein the top surface spans a horizontal direction, and wherein the first IC die is spaced apart from the second IC die; and
a third die that is coupled to the first IC die and the second IC die in a vertical direction different from the horizontal direction, wherein the third die electrically interconnects the first IC die to the second IC die, wherein the third die includes a third substrate having a second crystal lattice surface orientation is different from the first crystal lattice surface orientation.