| CPC H01L 23/53295 (2013.01) [H01L 21/7682 (2013.01); H01L 21/76831 (2013.01); H01L 21/76844 (2013.01); H01L 21/76846 (2013.01); H10B 12/0335 (2023.02); H10B 12/315 (2023.02); H01L 21/76843 (2013.01)] | 9 Claims |

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1. A method for fabricating a semiconductor device, comprising:
providing a substrate;
forming an interconnection structure on the substrate;
forming a contact opening penetrating the interconnection structure;
conformally forming a contact barrier layer in the contact opening, wherein the contact barrier layer has two side segments and a bottom segment;
conformally forming an adjustment layer that covers an upper portion of the contact barrier layer, such that the bottom segment of the contact barrier layer is free from the adjustment layer, wherein a thickness of the adjustment layer is gradually reduced from top to bottom; and
forming a contact in the contact opening, such that the adjustment layer is formed at an upper portion of a sidewall of the contact.
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