US 12,424,522 B2
Leadless semiconductor packages, leadframes therefor, and methods of making
Darrell D. Truhitte, Phoenix, AZ (US); Soon Wei Wang, Seremban (MY); and Chee Hiong Chew, Seremban (MY)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Aug. 4, 2020, as Appl. No. 16/984,758.
Application 16/984,758 is a division of application No. 16/230,494, filed on Dec. 21, 2018, granted, now 10,756,006.
Application 13/190,922 is a division of application No. 12/362,142, filed on Jan. 29, 2009, granted, now 8,071,427, issued on Dec. 6, 2011.
Application 16/230,494 is a continuation of application No. 15/415,504, filed on Jan. 25, 2017, granted, now 10,199,311, issued on Feb. 5, 2019.
Application 15/415,504 is a continuation in part of application No. 15/357,680, filed on Nov. 21, 2016, granted, now 10,163,766, issued on Dec. 25, 2018.
Application 15/415,504 is a continuation in part of application No. 15/063,011, filed on Mar. 7, 2016, granted, now 9,899,349, issued on Feb. 20, 2018.
Application 15/357,680 is a continuation in part of application No. 14/168,850, filed on Jan. 30, 2014, abandoned.
Application 14/168,850 is a continuation in part of application No. 13/692,514, filed on Dec. 3, 2012, abandoned.
Application 13/692,514 is a continuation of application No. 13/190,922, filed on Jul. 26, 2011, granted, now 8,324,026, issued on Dec. 4, 2012.
Prior Publication US 2020/0365494 A1, Nov. 19, 2020
Int. Cl. H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/49541 (2013.01) [H01L 21/4828 (2013.01); H01L 21/561 (2013.01); H01L 23/49548 (2013.01); H01L 23/49575 (2013.01); H01L 23/49582 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 24/97 (2013.01); H01L 21/568 (2013.01); H01L 23/3107 (2013.01); H01L 24/85 (2013.01); H01L 2224/05014 (2013.01); H01L 2224/05553 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48157 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48464 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/97 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/17747 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19107 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first semiconductor die, a second semiconductor die, a third semiconductor die, and a fourth semiconductor die;
a first plurality of contacts adjacent to the first semiconductor die, a second plurality of contacts adjacent to the second semiconductor die, a third plurality of contacts adjacent to the third semiconductor die, and a fourth plurality of contacts adjacent to the fourth semiconductor die;
a first plurality of tie bars adjacent to the first semiconductor die, a second plurality of tie bars adjacent to the second semiconductor die, a third plurality of tie bars adjacent to the third semiconductor die, and a fourth plurality of tie bars adjacent to the fourth semiconductor die;
an encapsulant coupled at least partially over each of the semiconductor die and each of the plurality of contacts; and
a first trench in a first surface of the encapsulant laterally adjacent to each of the plurality of contacts;
wherein a depth of the first trench extends across a full vertical thickness of at least two contacts within each of the plurality of contacts;
wherein, the first trench extends only partially into a thickness of the encapsulant;
wherein the first plurality of contacts and the second plurality of contacts are exposed on a first sidewall of the first trench and the third plurality of contacts and the fourth plurality of contacts are exposed on a second sidewall of the first trench; and
wherein the first plurality of contacts is opposite the fourth plurality of contacts and the second plurality of contacts is opposite the third plurality of contacts.