| CPC H01L 23/481 (2013.01) [H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 64/021 (2025.01)] | 20 Claims |

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15. A semiconductor device comprising:
a substrate having an upper side and a lower side opposite to each other;
a transistor structure disposed on the upper side of the substrate, and including a pair of epitaxial structures spaced apart from each other and a channel feature extending in a channel length direction to be disposed between the epitaxial structures;
a back-side via structure disposed on the lower side of the substrate and extending through the substrate, the back-side via structure being connected to a corresponding one of the epitaxial structures, the back-side via structure being formed with an upper surface on opposite sides of the corresponding one of the epitaxial structures in a channel width direction transverse to the channel length direction and a recessed surface which is recessed inwardly from the upper surface, the back-side via structure being connected to a lower portion of the corresponding one of the epitaxial structures; and
a sidewall spacer directly on the upper surface of the back-side via structure and directly contacting the opposite sides of the corresponding one of the epitaxial structures,
wherein the recessed surface has a bottom surface portion directly connected to a bottom surface of the lower portion of the corresponding one of the epitaxial structures, and a first sidewall surface portion extending between the upper surface of the back-side via structure and the bottom surface portion of the recessed surface and connected to a first side of the opposite sides of the lower portion of the corresponding one of the epitaxial structures.
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