US 12,424,518 B2
Capacitor embedded 3D resonator for broadband filter
Jonghae Kim, San Diego, CA (US); Je-Hsiung Lan, San Diego, CA (US); Kai Liu, Phoenix, AZ (US); and Ranadeep Dutta, Del Mar, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Feb. 28, 2022, as Appl. No. 17/682,868.
Prior Publication US 2023/0275004 A1, Aug. 31, 2023
Int. Cl. H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H03H 7/01 (2006.01)
CPC H01L 23/481 (2013.01) [H01L 21/76898 (2013.01); H01L 23/5223 (2013.01); H01L 23/5227 (2013.01); H03H 7/0115 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An integrated circuit (IC), comprising:
a substrate;
a first through substrate via (TSV) in the substrate, the first TSV comprising:
a first metal-insulator-metal (MIM) capacitor comprising:
a first plate composed of a first metallization layer on an inner surface of the first TSV,
a MIM insulator layer on the first plate, and
a second plate composed of a second metallization layer on the MIM insulator layer;
a 3D inductor comprising:
a second TSV in the substrate,
a first trace on a first surface of the substrate, coupled to a first end of the second TSV, and
a second trace on a second surface of the substrate, opposite the first surface, coupled to a second end, opposite the first end, of the second TSV and a second end of the first TSV;
a third TSV in the substrate, the third TSV comprising:
a second MIM capacitor comprising:
a third plate composed of the first metallization layer on an inner surface of the third TSV,
the MIM insulator layer on the third plate, and
a fourth plate composed of the second metallization layer on the MIM insulator layer; and
a third trace on the first surface of the substrate and coupled to a first end of the first TSV and a first end of the third TSV.