US 12,424,485 B2
Semiconductor structure with air gap and method for manufacturing the same
Kai-Fang Cheng, Hsinchu (TW); and Hsiao-Kang Chang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jul. 28, 2022, as Appl. No. 17/875,625.
Prior Publication US 2024/0038586 A1, Feb. 1, 2024
Int. Cl. H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01)
CPC H01L 21/7682 (2013.01) [H01L 21/76805 (2013.01); H01L 21/76846 (2013.01); H01L 21/76849 (2013.01); H01L 21/76895 (2013.01); H01L 23/5329 (2013.01); H01L 23/535 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor structure, comprising:
forming a stack over a substrate, the stack including a sacrificial layer, an inter-metal dielectric layer, and a sustaining layer formed between the sacrificial layer and the inter-metal dielectric layer;
patterning the stack to form recesses spaced apart from each other, each of the recesses penetrating through the stack such that the sacrificial layer, the sustaining layer and the inter-metal dielectric layer are respectively patterned into a sacrificial feature, a sustaining feature and an inter-metal dielectric feature;
forming electrically conductive portions respectively in the recesses; and
removing the sacrificial feature to form an air gap layer in the patterned stack.