US 12,424,484 B2
Spacers for semiconductor devices including backside power rails
Li-Zhen Yu, New Taipei (TW); Huan-Chieh Su, Tianzhong Township (TW); Lin-Yu Huang, Hsinchu (TW); Cheng-Chi Chuang, New Taipei (TW); and Chih-Hao Wang, Baoshan Township (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 26, 2022, as Appl. No. 17/815,080.
Application 17/815,080 is a division of application No. 17/088,002, filed on Nov. 3, 2020, granted, now 11,557,510.
Claims priority of provisional application 63/058,660, filed on Jul. 30, 2020.
Prior Publication US 2022/0367241 A1, Nov. 17, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 21/762 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 64/01 (2025.01)
CPC H01L 21/7682 (2013.01) [H01L 21/76283 (2013.01); H01L 21/76877 (2013.01); H01L 23/5286 (2013.01); H10D 30/6219 (2025.01); H10D 64/021 (2025.01); H01L 21/31116 (2013.01); H01L 21/31122 (2013.01); H01L 23/5226 (2013.01); H10D 30/026 (2025.01); H10D 30/031 (2025.01); H10D 64/018 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a first transistor on a first substrate;
exposing a first epitaxial material, wherein exposing the first epitaxial material comprises thinning a backside of the first substrate;
replacing the first epitaxial material with a backside via, the backside via being electrically coupled to a source/drain region of the first transistor;
forming a conductive line over the backside via, the conductive line being electrically coupled to the backside via;
forming a dummy spacer adjacent the conductive line;
etching the dummy spacer to form a first recess; and
sealing the first recess to form an air spacer.