US 12,424,477 B2
Wafer chuck
Chun-Chi Chou, Hsinchu (TW); Chung-Ming Kuo, Hsinchu County (TW); Bo-An Tsai, Hsinchu (TW); and Shyng-Yeuan Che, Hsinchu County (TW)
Assigned to Powerchip Semiconductor Manufacturing Corporation, Hsinchu (TW)
Filed by Powerchip Semiconductor Manufacturing Corporation, Hsinchu (TW)
Filed on Nov. 23, 2023, as Appl. No. 18/518,586.
Claims priority of application No. 112140285 (TW), filed on Oct. 20, 2023.
Prior Publication US 2025/0132183 A1, Apr. 24, 2025
Int. Cl. H01T 23/00 (2006.01); H01L 21/67 (2006.01); H01L 21/683 (2006.01)
CPC H01L 21/6833 (2013.01) [H01L 21/67098 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A wafer chuck, comprising:
a substrate comprising a first surface facing a wafer to be carried and a second surface opposite to the first surface; and
a heating/cooling wafer disposed on the first surface of the substrate and comprising a plurality of heating/cooling units arranged in an array, wherein positions of the heating/cooling units and positions of a plurality of dies comprising in the wafer to be carried are corresponded to each other in a direction perpendicular to the first surface, so that the heating/cooling units are capable of heating or cooling corresponding dies independently,
wherein the substrate comprises a pipe buried therein, the pipe comprises an inlet and an outlet at opposite ends of the pipe, and the inlet and the outlet are opened on the second surface of the substrate, and
wherein each of the heating/cooling units comprises:
a first and a second electrodes spaced apart from each other;
a conductive layer above the first and the second electrodes;
a first semiconductor layer between the first electrode and the conductive layer and having a first conductivity type; and
a second semiconductor layer between the second electrode and the conductive layer and being spaced apart from the first semiconductor layer, wherein the second semiconductor layer has a second conductivity type different from the first conductivity type.