US 12,424,438 B2
Low-k dielectric and processes for forming same
Chia Cheng Chou, Keelung (TW); Po-Cheng Shih, Hsinchu (TW); Li Chun Te, Renwu Township (TW); and Tien-I Bao, Taoyuan (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Feb. 24, 2021, as Appl. No. 17/183,807.
Application 16/569,791 is a division of application No. 15/944,627, filed on Apr. 3, 2018, granted, now 10,910,216, issued on Feb. 2, 2021.
Application 17/183,807 is a continuation of application No. 16/569,791, filed on Sep. 13, 2019, granted, now 11,062,901.
Claims priority of provisional application 62/591,536, filed on Nov. 28, 2017.
Prior Publication US 2021/0183646 A1, Jun. 17, 2021
Int. Cl. H01L 21/02 (2006.01); C23C 16/30 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01)
CPC H01L 21/02274 (2013.01) [C23C 16/30 (2013.01); H01L 21/02126 (2013.01); H01L 21/02216 (2013.01); H01L 21/31116 (2013.01); H01L 21/76805 (2013.01); H01L 21/76832 (2013.01); H01L 21/76843 (2013.01); H01L 21/76871 (2013.01); H01L 21/76895 (2013.01); H01L 23/53295 (2013.01); H01L 23/535 (2013.01); H01L 23/53209 (2013.01); H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 23/53252 (2013.01); H01L 23/53266 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a metal pattern on a semiconductor substrate;
an etch stop structure covering the metal pattern, the etch stop structure including a sequentially stacked first insulation layer, second insulation layer, and third insulation layer;
an interlayer dielectric layer on the etch stop structure, wherein the interlayer dielectric layer has no pores and has a constant carbon concentration, wherein the interlayer dielectric layer has a concentration of Si—C—Si bonds in a range from 8 percent to 50 percent, and wherein the interlayer dielectric layer has a concentration of Si—CH3 bonds in a range from 5 percent to 40 percent; and
a contact plug penetrating the interlayer dielectric layer and the etch stop structure, the contact plug being connected to the metal pattern, wherein the contact plug has straight sidewalls that remain straight as the straight sidewalls extend from a top of the interlayer dielectric layer to a bottom of the etch stop structure,
wherein the first insulation layer includes a first insulating material that contains a metallic element and nitrogen,
wherein the second insulation layer includes a second insulating material that contains carbon, and
wherein the third insulation layer includes a third insulating material that contains silicon and which is different from the first insulating material and the second insulating material.