US 12,424,287 B2
Memory read voltage threshold tracking based on memory device-originated metrics characterizing voltage distributions
Shantilal Rayshi Doru, San Diego, CA (US); Patrick R. Khayat, San Diego, CA (US); Steven Michael Kientz, Westminster, CO (US); Sampath K. Ratnam, San Jose, CA (US); and Dung Viet Nguyen, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Nov. 13, 2023, as Appl. No. 18/507,387.
Claims priority of provisional application 63/425,535, filed on Nov. 15, 2022.
Prior Publication US 2024/0161836 A1, May 16, 2024
Int. Cl. G06F 12/02 (2006.01); G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01)
CPC G11C 16/3404 (2013.01) [G06F 12/0246 (2013.01); G11C 11/5642 (2013.01); G11C 16/0483 (2013.01); G11C 16/26 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory array comprising a plurality of memory cells; and
a controller coupled to the memory array, the controller configured to:
receive a first value of a metric characterizing threshold voltage distributions of a subset of a set of the plurality of memory cells connected to one or more bitlines, wherein the metric reflects a conductive state of the one or more bitlines;
determine, via a first calibration operation, a first voltage threshold adjustment value based on the first value of the metric;
receive a second value of the metric characterizing the threshold voltage distributions of the subset of the set of the plurality of memory cells connected to the one or more bitlines responsive to a first read operation performed with respect to the subset of the set of the plurality of memory cells based on the first voltage threshold adjustment value;
determine, via a second calibration operation, a second voltage threshold adjustment value based on the second value of the metric; and
apply the second voltage threshold adjustment value for reading the set of the plurality of memory cells.