| CPC G11C 13/0064 (2013.01) [G11C 13/0033 (2013.01); G11C 13/0069 (2013.01); G11C 29/04 (2013.01); G11C 29/50008 (2013.01); G11C 29/88 (2013.01); H10B 63/20 (2023.02); H10B 63/22 (2023.02); H10B 63/24 (2023.02); H10B 63/80 (2023.02); H10B 63/84 (2023.02); H10N 70/826 (2023.02); G11C 11/1659 (2013.01); G11C 11/1677 (2013.01); G11C 11/2259 (2013.01); G11C 13/0004 (2013.01); G11C 13/003 (2013.01); G11C 2029/5006 (2013.01); G11C 2213/76 (2013.01); H10B 63/30 (2023.02)] | 15 Claims |

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1. A semiconductor device comprising:
a plurality of first conductive lines extending in a first direction;
a plurality of second conductive lines spaced apart from the first conductive lines and extending in a second direction intersecting the first direction;
a plurality of memory cells respectively disposed at intersection regions between the first conductive lines and the second conductive lines such that each memory cell is located between a first conductive line and a second conductive line; and
a plurality of layers respectively formed between each memory cell of the plurality of memory cells and either a corresponding first conductive line or a corresponding second conductive line,
wherein each layer of the plurality of layers includes a conductive material that is capable of generating a void to create an open circuit by electromigration when a current applied to a layer through a first conductive line corresponding to the layer and a second conductive line corresponding to the layer exceeds a threshold current and is electrically conductive when the current applied to the layer is below the threshold current.
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