US 12,424,147 B2
Gate signal masking circuit, gate driver including the same and display apparatus including the same
Kyungho Kim, Yongin-si (KR); and Gichang Lee, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., LTD., Yongin-si (KR)
Filed on Feb. 14, 2024, as Appl. No. 18/441,382.
Claims priority of application No. 10-2023-0053637 (KR), filed on Apr. 24, 2023.
Prior Publication US 2024/0355269 A1, Oct. 24, 2024
Int. Cl. G09G 3/3266 (2016.01); G09G 3/32 (2016.01)
CPC G09G 3/32 (2013.01) [G09G 2300/0426 (2013.01); G09G 2310/0267 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A gate signal masking circuit comprising:
a first switching element including a control electrode connected to a masking control node, a first electrode connected to a first control node and a second electrode connected to a third control node;
a second switching element including a control electrode which receives a carry signal, a first electrode which receives a masking power signal and a second electrode connected to a first intermediate node;
a third switching element including a control electrode which receives a first enable signal, a first electrode connected to the first intermediate node and a second electrode connected to the masking control node;
a fourth switching element including a control electrode which receives a second enable signal, a first electrode connected to the masking control node and a second electrode connected to a second intermediate node; and
a fifth switching element including a control electrode which receives the carry signal, a first electrode connected to the second intermediate node and a second electrode which receives a low power voltage.