US 12,423,408 B1
Systems and methods for optimizing authentication branch instructions
Conrado Blasco, Sunnyvale, CA (US); Ian D. Kountanis, Santa Clara, CA (US); Douglas C. Holman, San Jose, CA (US); Sean M. Reynolds, Cupertino, CA (US); and Richard F. Russo, San Jose, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Sep. 21, 2022, as Appl. No. 17/934,143.
Application 17/934,143 is a continuation of application No. 15/484,439, filed on Apr. 11, 2017, granted, now 11,468,168, issued on Oct. 11, 2022.
Int. Cl. G06F 21/52 (2013.01); G06F 21/56 (2013.01)
CPC G06F 21/52 (2013.01) [G06F 21/565 (2013.01); G06F 21/566 (2013.01); G06F 2221/034 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor, comprising:
an execution core comprising an authentication circuit and configured to:
generate, prior to completing execution of a fetched call instruction, a signature to be used for authenticating a return address of a subroutine identified by the call instruction;
store, in a data storage location, a concatenation of the return address of the subroutine and the signature; and
transfer control of a computer program to the subroutine, based at least in part on a determination that execution of the call instruction has completed.