| CPC G06F 12/0831 (2013.01) [G06F 12/0871 (2013.01); G06F 2212/1024 (2013.01)] | 19 Claims |
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1. An apparatus comprising:
a non-inclusive cache configured to cache data; and
coherency control circuitry configured to:
look up the non-inclusive cache in response to a coherent access request from a first requestor,
in response to determining that the coherent access request can be serviced using data stored in a matching entry of the non-inclusive cache, reference snoop-filter information associated with the matching entry to determine whether the first requestor can use the data stored in the matching entry without waiting for a response to a snoop of a higher level coherent cache, further in a cache hierarchy from a memory than the non-inclusive cache, permitted to store a different version of the data stored in the matching entry of the non-inclusive cache,
track snoop-filter information only for addresses allocated a valid entry in the non-inclusive cache, and
in response to determining that the coherent access request cannot be serviced using data stored in the non-inclusive cache, issue a speculative memory access request to memory whilst it is unknown whether the coherent access request can be serviced by the coherent cache, and in response to return of returned data from the memory, either:
provide the returned data to the first requestor in a message indicating that the first requestor should wait for responses to any issued snoop requests before using the returned data, or
delay providing the returned data to the first requestor until receipt of a snoop response from the coherent cache indicating that the coherent cache cannot service the coherent access request.
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