US 12,422,998 B2
Memory device and memory system for performing partial write operation, and operating method thereof
Soo Hong Ahn, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Oct. 12, 2023, as Appl. No. 18/485,317.
Claims priority of application No. 10-2023-0059037 (KR), filed on May 8, 2023.
Prior Publication US 2024/0377958 A1, Nov. 14, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0614 (2013.01) [G06F 3/0652 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A memory system comprising:
a controller configured to transmit a reset write command and reset write data, and transmit a set write command and set write data; and
at least one memory device configured to
generate seed data by performing a first operation on the reset write data and read data read out from a target memory area in response to the reset write command,
generate write data by performing a second operation on the seed data and the set write data in response to the set write command, and
write back the write data to the target memory area.