| CPC G05F 1/575 (2013.01) [G05F 1/565 (2013.01); G05F 3/247 (2013.01); G05F 3/262 (2013.01)] | 20 Claims |

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1. A voltage regulator circuit comprising:
a negative-channel metal-oxide semiconductor (NMOS) coupled to a regulated voltage output of the voltage regulator circuit;
a sensing circuit for sensing the regulated voltage output;
a reference voltage circuit for supplying a correct bias voltage to the sensing circuit; and
a voltage inversion circuit coupled between the sensing circuit and the NMOS, wherein the voltage inversion circuit lacks a resistor.
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