US 12,422,470 B2
Semiconductor packages with through via structures and methods for testing the same
Ying-Chih Hsu, Hsinchu (TW); Jui-Cheng Huang, Hsinchu (TW); Mu Wei Lee, Hsinchu (TW); and Wei-Tao Shaw, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Oct. 2, 2023, as Appl. No. 18/479,462.
Prior Publication US 2025/0110172 A1, Apr. 3, 2025
Int. Cl. G01R 31/28 (2006.01)
CPC G01R 31/2853 (2013.01) [G01R 31/2843 (2013.01); G01R 31/2884 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
an array of through-substrate-via (TSV) structures comprising a number (O) of TSV structures, wherein the array comprises a number (M) of active TSV structures;
a number (N) of contact structures, the contact structures comprising a plurality of pairs configured to receive an input test signal and provide an output test signal, respectively; and
a plurality of binary-tree branches, each of the plurality of binary-tree branches electrically coupling a first one of the active TSV structures to a second one of the active TSV structures and a third one of the active TSV structures.