US 12,422,466 B2
Bonding quality test method, bonding quality test circuit, and memory device including bonding quality test circuit
Sangsu Park, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Sep. 26, 2023, as Appl. No. 18/474,470.
Claims priority of application No. 10-2023-0013682 (KR), filed on Feb. 1, 2023.
Prior Publication US 2024/0255564 A1, Aug. 1, 2024
Int. Cl. G11C 7/00 (2006.01); G01R 31/26 (2020.01); G11C 16/04 (2006.01); G11C 16/16 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10B 80/00 (2023.01)
CPC G01R 31/2637 (2013.01) [G11C 16/0483 (2013.01); G11C 16/16 (2013.01); H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H10B 80/00 (2023.02); H01L 2224/08145 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A bonding quality test circuit configured to test a bonding between a line provided to a memory device and a peripheral circuit that drives the memory device, the bonding quality test circuit comprising:
a switching circuit configured to provide an electrical connection between a sensing node and a bonding node, the bonding node corresponding to a first end of a bonding resistor that is between the line and the peripheral circuit;
a precharging circuit configured to provide a precharge voltage to the line and the sensing node when the precharging circuit is electrically connected to the line and the sensing node by the switching circuit;
a latch circuit that includes a first node configured to provide a control output signal to the precharging circuit and a second node configured to have a voltage that is phase inverted with respect to a voltage of the control output signal; and
a first transistor configured to provide an output signal according to the sensing node when the first transistor is electrically connected to the second node of the latch circuit.