| CPC B64D 27/24 (2013.01) [B60L 15/06 (2013.01); B60L 15/38 (2013.01); B64C 27/54 (2013.01); B64C 29/0008 (2013.01); B64C 29/0033 (2013.01); B64D 27/30 (2024.01); B64D 33/08 (2013.01); B64D 35/02 (2013.01); F16B 2/06 (2013.01); F16H 57/08 (2013.01); H02K 1/27 (2013.01); H02K 1/32 (2013.01); H02K 5/124 (2013.01); H02K 5/203 (2021.01); H02K 7/08 (2013.01); H02K 7/116 (2013.01); H02K 9/19 (2013.01); H02K 11/33 (2016.01); H02K 15/03 (2013.01); H02M 7/5395 (2013.01); H02P 21/50 (2016.02); H02P 25/16 (2013.01); H02P 27/06 (2013.01); H02P 27/08 (2013.01); B60L 2200/10 (2013.01); B60L 2210/40 (2013.01); H02K 7/006 (2013.01)] | 22 Claims |

|
1. A method for controlling an inverter circuit, comprising:
detecting whether a fault occurs on one of a plurality of switches in the inverter circuit;
disconnecting the inverter circuit from a power source, in response to a detection of a single-phase short-circuit fault; and
discharging a bus voltage across a capacitor of the inverter circuit after the inverter circuit is disconnected from the power source by:
using a first discharging circuit to provide a first discharging path, in response to a confirmation that the inverter circuit is disconnected from the power source; and
using a second discharging circuit to provide a second discharging path in parallel to the first discharging path, in response to the bus voltage being lower than a threshold value.
|