| CPC H04N 25/59 (2023.01) [H01L 27/14612 (2013.01); H01L 27/14643 (2013.01); H04N 25/531 (2023.01); H04N 25/583 (2023.01); H04N 25/585 (2023.01); H04N 25/62 (2023.01); H04N 25/75 (2023.01); H04N 25/778 (2023.01)] | 20 Claims |
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1. A pixel arrangement comprising:
a photodetector configured to accumulate charge carriers by converting electromagnetic radiation;
a transfer transistor electrically coupled to the photodetector;
a diffusion node electrically coupled to the transfer transistor;
a reset transistor electrically coupled to the diffusion node and to a pixel supply voltage; and
a sample-and-hold stage comprising at least a first capacitor and a second capacitor, an input of the sample-and-hold stage being electrically coupled to the diffusion node via an amplifier,
wherein the transfer transistor is configured to be pulsed to different voltage levels for transferring parts of the accumulated charge carriers to the diffusion node,
wherein at least the second capacitor is configured to store a low conversion gain signal representing a first part of the accumulated charge carriers, and
wherein the first capacitor is configured to store a high conversion gain signal representing a remaining part of the accumulated charge carriers.
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