US 12,095,711 B2
Integrated circuit with radio frequency interconnect
Huan-Neng Chen, Hsinchu (TW); William Wu Shen, Hsinchu (TW); Chewn-Pu Jou, Hsinchu (TW); Feng Wei Kuo, Hsinchu (TW); Lan-Chou Cho, Hsinchu (TW); Tze-Chiang Huang, Saratoga, CA (US); Jack Liu, Hsinchu (TW); and Yun-Han Lee, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Mar. 27, 2023, as Appl. No. 18/190,881.
Application 18/190,881 is a continuation of application No. 15/931,273, filed on May 13, 2020, granted, now 11,616,631.
Application 15/931,273 is a continuation of application No. 14/921,205, filed on Oct. 23, 2015, granted, now 10,673,603, issued on Jun. 2, 2020.
Prior Publication US 2023/0239129 A1, Jul. 27, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04J 3/00 (2006.01); H04L 5/14 (2006.01); H04W 52/02 (2009.01)
CPC H04L 5/14 (2013.01) [H04W 52/0261 (2013.01); Y02D 30/70 (2020.08)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
first through fourth devices positioned over one or more substrates;
a first radio frequency interconnect (RFI) comprising:
a first transmitter included in the first device;
a first receiver included in the second device; and
a first guided transmission medium coupled to each of the first transmitter and the first receiver;
a second RFI comprising:
a second transmitter included in the first device;
a second receiver included in the third device; and
a second guided transmission medium coupled to each of the second transmitter and the second receiver; and
a third RFI comprising:
a third transmitter included in the first device;
a third receiver included in the fourth device; and
the second guided transmission medium coupled to each of the third transmitter and the third receiver.