US 12,094,980 B2
Semiconductor device
Tatsuya Toda, Tokyo (JP); Masashi Tsubuku, Tokyo (JP); and Toshinari Sasaki, Tokyo (JP)
Assigned to JAPAN DISPLAY INC., Tokyo (JP)
Filed by Japan Display Inc., Tokyo (JP)
Filed on Sep. 24, 2021, as Appl. No. 17/483,836.
Application 17/483,836 is a continuation of application No. PCT/JP2020/005321, filed on Feb. 12, 2020.
Claims priority of application No. 2019-065023 (JP), filed on Mar. 28, 2019.
Prior Publication US 2022/0013668 A1, Jan. 13, 2022
Int. Cl. H01L 27/12 (2006.01); G01N 23/20091 (2018.01); H01L 29/786 (2006.01)
CPC H01L 29/7869 (2013.01) [G01N 23/20091 (2013.01); H01L 27/1225 (2013.01); H01J 2237/2442 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an oxide semiconductor layer including indium;
a gate electrode facing the oxide semiconductor layer;
a gate insulating layer between the oxide semiconductor layer and the gate electrode; and
a first electrode arranged above the oxide semiconductor layer and being in contact with the oxide semiconductor layer from above the oxide semiconductor layer,
wherein indium is unevenly distributed in an unevenly distributed region among the oxide semiconductor layer,
the unevenly distributed region overlapping with a first conductive layer in a planar view,
a part of the oxide semiconductor layer overlapping with the first electrode in a planar view includes a first region arranged in a side of the first electrode and a second region arranged in a side closer to the gate electrode than the first region, and
a crystal particle size of indium unevenly distributed in the second region is larger than a crystal particle size of indium unevenly distributed in the first region.