CPC G11C 11/44 (2013.01) | 16 Claims |
1. A Josephson junction based memory device comprising:
a plurality of superconducting loops wherein each superconducting loop comprises at least one Josephson junction, wherein the plurality of superconducting loops are electrically coupled in a series arrangement, wherein each superconducting loop of the plurality of superconducting loops has one or two adjacent loops, and wherein the plurality of superconducting loops comprises:
a plurality of input loops;
a plurality of readout loops; and
at least one shared loop, wherein the plurality of superconducting loops are configured to store or annihilate magnetic flux quanta in one or more of the superconducting loops in response to a combination of control signals and single flux quantum (SFQ) pulses, wherein the plurality of superconducting loops are configured to shift a magnetic flux quanta from an initial superconducting loop to an adjacent loop in response to a SFQ pulse applied to the initial superconducting loop, wherein the magnetic flux quanta is shifted from an initial superconducting loop to an adjacent loop in a first direction along the series arrangement in response to a positive SFQ pulse polarity, and wherein the magnetic flux quanta is shifted from an initial superconducting loop to an adjacent loop in a second direction along the series arrangement in response to a negative SFQ pulse polarity.
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