CPC G11C 11/40615 (2013.01) [G11C 11/40611 (2013.01); G11C 11/4085 (2013.01); G11C 11/4087 (2013.01); G11C 2211/4067 (2013.01)] | 18 Claims |
1. A memory device coupled to a memory controller, comprising:
a memory array comprising a plurality of cells, wherein each of the cells is coupled to a word-line; and
an access circuit configured to be coupled between the memory controller and the memory array and coupled to the memory controller and the memory array,
wherein:
in a normal mode, the access circuit executes a refresh action for the cells which are coupled to at least one word-line in response to the memory controller outputting an auto-refresh command, and
in a standby mode, the access circuit selects one of the word-lines and determines whether to execute the refresh action for the cells coupled to the selected word-line according to a retention capability of the selected word-line at regular time intervals,
the access circuit comprises:
a non-volatile memory storing capability information;
a timer circuit outputting a trigger signal at regular time intervals;
a control logic circuit reading a count value after receiving the trigger signal to select specific capability information among the capability information and generating a control signal according to the specific capability information; and
a driving circuit selecting a specific word-line of the word-lines according to the count value and determining whether to execute the refresh action for the cells coupled to the specific word-line according to the control signal,
in response to the control signal being enabled, the driving circuit executes the refresh action for the cell coupled to the specific word-line, and
in response to the control signal not being enabled, the driving circuit does not execute the refresh action for the cell coupled to the specific word-line.
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