US 12,094,510 B2
Magnetoresistive random access memory (MRAM) with end of life margin sensor
Anirban Roy, Austin, TX (US); Thomas Stephen Harp, Austin, TX (US); Nihaar N. Mahatme, Austin, TX (US); and Jon Scott Choy, Austin, TX (US)
Assigned to NXP USA, Inc., Austin, TX (US)
Filed by NXP USA, Inc., Austin, TX (US)
Filed on Jun. 17, 2022, as Appl. No. 17/807,518.
Prior Publication US 2023/0410870 A1, Dec. 21, 2023
Int. Cl. G11C 11/16 (2006.01)
CPC G11C 11/1675 (2013.01) [G11C 11/1655 (2013.01); G11C 11/1657 (2013.01); G11C 11/1673 (2013.01); G11C 11/1677 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A magnetoresistive random access memory (MRAM) comprising:
an MRAM array including a data array and a sensor array, the MRAM array arranged in rows and columns, each row having a corresponding word line and each column having a corresponding bit line and a corresponding source line, wherein an intersection of each row and column has a corresponding MRAM cell, wherein each corresponding MRAM cell includes a select transistor and a Magnetic Tunnel Junction (MTJ), wherein:
each MRAM cell of the data array is configured to store a data bit, and
in the sensor array, a first column is connected to a second column to form a sensor column, the sensor column including sensor cells in which each sensor cell is formed by a first MRAM cell in the first column together with a second MRAM cell in the second column along a same word line, wherein only one of a first MTJ of the first MRAM cell or a second MTJ of the second MRAM cell is used as an MTJ of the sensor cell, and drain electrodes of a first select transistor of the first MRAM cell and a second select transistor of the second MRAM cell are electrically connected to each other wherein the drain electrode of the first select transistor of the first MRAM cell is located between a gate of the first select transistor and the first MTJ and the drain electrode of the second select transistor of the second MRAM cell is located between a gate of the second select transistor and the second MTJ;
read circuitry configured to provide a set of output bits as read data from a set of selected MRAM cells at a read address of the data array and configured to provide a sensor output indicative of a rupture state of an MTJ of a selected sensor cell of the sensor array; and
a life predictor circuit configured to provide a warning indicating of impending failure of the data array based on the sensor output.